Many high performance radio frequency (RF) and analog circuits need precision bias circuits to operate properly. Desirable bias circuit characteristics include low noise, low drift, high accuracy and substantial isolation from stage to stage. It is also desirable that bias circuits be adjustable. Adjustability in the bias circuit is especially relevant to RF circuits which often exhibit parasitics that can not be simulated when the RF circuit is fabricated in an integrated circuit form. Parasitics such as unintended capacitive, inductive and conductive effects can degrade a circuit's performance. An adjustable bias circuit is desirable to compensate for these unforeseen parasitics after manufacture.
One problem with analog-based bias networks is that high power dissipation and large silicon area consumption are often needed to obtain high accuracy, low noise and other high performance characteristics. Moreover, analog bias networks are not easily adjusted once they are fabricated. Another problem encountered with analog-based bias networks is that when a common bias source is used to bias multiple circuit stages, this tends to provide undesired coupling between the stages. For example, if two RF amplifiers are biased by a common voltage source or current source, this tends to result in undesired linkage between the two stages.
What is needed is a way to bias a circuit in a manner which permits adjustment of the bias while reducing undesired coupling among load circuits coupled to the bias circuit.